Senior Dft Engineer jobs - San Jose, CA
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| Mar 17 | SENIOR DFT SOFTWARE ENGINEER | NVIDIA | Santa Clara, CA |
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SENIOR DFT SOFTWARE ENGINEER NVIDIA develops large, complex, high performance ... The DFT Software Development Engineer will develop software tools for... more |
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| Mar 16 | SENIOR DFT SOFTWARE ENGINEER | NVIDIA | Santa Clara, CA |
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SENIOR DFT SOFTWARE ENGINEER Job ID 1254433 Description SENIOR DFT SOFTWARE ENGINEER ... The DFT Software Development Engineer will develop software tools for... more |
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| Mar 16 | Senior SOC Design Engineer | Marvell | Santa Clara, CA |
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Title: Senior SOC Design Engineer Job Category: Engineering Job Sub Category: Digital ... and implementation. Knowledge in DFT, Memory BIST. Familiar with high speed... more |
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| Mar 16 | PROGRAM ENG II / Sr. Manufacturing Engineer | Abbott Medical Optics | Milpitas, CA |
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Implement DFM/DFT approaches. Provide technical support and troubleshooting for ... Preferred Qualifications: Have experience with LEAN/DFT manufacturing, Six Sigma and... more |
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| Mar 16 | ASIC Design Engineer - RTL - 65nm - Verification - DFT - FPGA | Cybercoders | Sunnyvale, CA |
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Design Engineer - RTL - 65nm - Verification - DFT - FPGA ASIC Design Engineer - RTL ... Wireless Job Description Senior ASIC Design Engineer - RTL - 65nm - Verification - DFT -... more |
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| Mar 16 | Senior Digital IC Design Engineer | St Jude Medical | Sunnyvale, CA |
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Senior Digital IC Design Engineer --We are seeking a talented technical engineer to be ... Other valued skills include synthesis, static timing analysis, and DFT/ATPG... more |
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| Mar 15 | Senior Staff DFT Engineer | Entropic Communications | San Jose, CA |
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Description: The DFT position involves the ownership of testability methodology and ... development of overall methodology for DFT and its efficient automation. A... more |
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| Mar 15 | Sr. Test Development Engineer | Atheros Communications | Santa Clara, CA |
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Test Development Engineer Location: Santa Clara Req Number: 2010125 # of openings: 1 ... to ensure product testability including DFT (design for test). The candidate will... more |
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| Mar 15 | ASIC Design Engineer - RTL - 65nm - Verification - DFT - FPGA | Cybercoders | San Mateo, CA |
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Engineer - RTL - 65nm - Verification - DFT - FPGA Senior ASIC Design Engineer - RTL ... Benefits Package So, if you are a Senior ASIC Design Engineer with RTL and... more |
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| Mar 15 | Sr. Test Development Engineer | Apple | Cupertino, CA |
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4933252 Job title Sr. Test Development Engineer Location Santa Clara Valley Country ... and Diagnostics on Design for Test (DFT) for new products (i.e. provide feedback... more |
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| Mar 14 | Hardware Engineer, Senior Camera Design Engineer, | Cisco Systems | San Jose, CA |
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Title: Hardware Engineer, Senior Camera Design Engineer, Profession: Computer ... Engineer Hardware Engineer, Senior Camera Design Engineer, Next... more |
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| Mar 12 | ASIC Design Engineer | Semiconductor Components Company | San Mateo, CA |
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you are a Senior ASIC Design Engineer with RTL and 65nm experience and live within ... Benefits Package So, if you are a Senior ASIC Design Engineer with RTL and... more |
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| Mar 11 | Sr. DFT engineer | Synapse Design Automation | San Jose, CA |
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DFT engineer Your responsibilities will include all aspects of the deployment ... in DFT / test field- Strong hands on DFT integration/tapeout of large chips with... more |
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| Mar 11 | Sr. DFT Engineer | Sandforce | Saratoga, CA |
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DFT ENGINEER SandForce, Inc., is transforming data storage by pioneering the use of ... Minimum Requirements: 7+ years of experience in DFT / design Strong logic Design, Verilog... more |
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| Mar 11 | Sr. DFT engineer | Synapse Design Automation | San Jose, CA |
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DFT engineer Your responsibilities will include all aspects of the deployment ... - 4 to10 years of experience in DFT / test field - Strong hands on DFT... more |
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| Mar 11 | Senior ASIC / Methodology Engineer | Teranetics | San Jose, CA |
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Senior ASIC / Methodology Engineer Job description Requisition Number 0720048 Job ... Job description Senior ASIC / Methodology Engineer As a senior member of our ASIC... more |
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| Mar 11 | ASIC Design and Verification Engineer | Link_a_media Devices | Santa Clara, CA |
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development, logic design and verification, DFT, synthesis and timing closure, test ... generation. The qualified verification engineer would be involved in architectural... more |
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| Mar 10 | Sr. Staff DFT Engineer | Entropic Communications | San Jose, CA |
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Staff DFT Engineer Category: Engineering Type: FullTimeEmployee Description: The DFT ... development of overall methodology for DFT and its efficient automation. A... more |
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| Mar 10 | Senior Digital IC Design Engineer | St Jude Medical | Sunnyvale, CA |
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Senior Digital IC Design Engineer -- We are seeking a talented technical engineer to ... Other valued skills include synthesis, static timing analysis, and DFT/ATPG... more |
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| Mar 10 | ASIC Design and Verification Engineers | Link A Media Devices | Santa Clara, CA |
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generation. The qualified verification engineer would be involved in architectural ... debugging and coverage measurement. Senior ASIC designers with experiences in... more |
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| Mar 10 | Director of Manufacturing | Infoblox | Santa Clara, CA |
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test plans, Engineering interface, DFM and DFT reviews, contract manufacturing ... in engaging with cross functional senior leadership Proven team leadership... more |
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| Mar 09 | Sr. DFT Engineer | Sandforce | Saratoga, CA |
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DFT ENGINEER SandForce, Inc., is transforming data storage by pioneering the use of ... companies. Responsibilities: As a DFT Engineer at SandForce, you'll be responsible... more |
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| Mar 08 | Engineer, Senior Hardware Design | St. Jude Medical | Sunnyvale, CA |
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Title: Engineer, Senior Hardware Design Location: Sunnyvale - CA - USA Job Category: ... professional: -- Senior Digital IC Design Engineer -- We are seeking a talented... more |
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| Mar 08 | Sr. Test Development Engineer | Atheros Communications | Santa Clara, CA |
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Test Development Engineer Location: Santa Clara Req Number: 2010125 # of openings: 1 ... to ensure product testability including DFT (design for test). The candidate will... more |
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| Mar 08 | Hardware Design Engineer (ASIC) | Ctsearch | San Jose, CA |
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RTL coding using verilog, synthesis, DFT and static timing analysis Working with verification team and backend team to successfully complete chip... more |
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| Mar 05 | Engineer, Senior Hardware Design | St. Jude Medical | Sunnyvale, CA |
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Title: Engineer, Senior Hardware Design Location: Sunnyvale - CA - USA Job Category: ... professional: -- Senior Digital IC Design Engineer -- We are seeking a talented... more |
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| Mar 05 | ASIC Verification Engineer | Koa Networks | San Jose, CA |
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generation. The qualified verification engineer would be involved in architectural ... debugging and coverage measurement. Senior ASIC designers with experiences in... more |
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| Mar 05 | Senior IC Design Engineer | St. Jude Medical | Sunnyvale, CA |
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are seeking a talented technical engineer to be a part of our Digital IC Design group. ... Other valued skills include synthesis, static timing analysis, and DFT/ATPG... more |
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| Mar 05 | Sr. ASIC Designer | Koa Networks | San Jose, CA |
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ASIC Designer Position: Sr. Design Engineer (Permanent, Full Time) Location: San ... RTL coding using verilog, synthesis, DFT and static timing analysis Working with... more |
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| Mar 03 | ASIC Verification Engineer | Koa Networks | San Jose, CA |
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generation. The qualified verification engineer would be involved in architectural ... debugging and coverage measurement. Senior ASIC designers with experiences in... more |
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| Mar 03 | Sr. ASIC Designer | Koa Networks | San Jose, CA |
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ASIC Designer Position: Sr. Design Engineer (Permanent, Full Time) Location: San Jose ... RTL coding using verilog, synthesis, DFT and static timing analysis Working with... more |
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| Mar 03 | Director of Manufacturing | Infoblox | Santa Clara, CA |
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test plans, Engineering interface, DFM and DFT reviews, contract manufacturing ... in engaging with cross functional senior leadership a Proven team leadership... more |
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| Mar 02 | Sr. Manufacturing Test Engineer | Renewable Search Group | San Jose, CA |
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Sr Manufacturing Test Engineer Location: Northern CA San Jose, Sunnyvale, San ... of PCB-level test, product-level test and DFT principals. Experience with embedded... more |
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| Mar 02 | Sr R&D Engineer | Synopsys | Mount View, CA |
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position is for a senior R & D engineer of the ASIC design team that is chartered ... - Experience with Synopsys tools, Design Compiler, SystemVerilog/VCS, Primetime, and DFT... more |
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| Mar 02 | PROGRAM ENG II Sr. Manufacturing Engineer | Abbott Medical Optics | Milpitas, CA |
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Apply principles of LEAN/DFT Manufacturing and pull systems to streamline production ... Implement DFM/DFT approaches. Provide technical support and troubleshooting for... more |
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| Mar 01 | Engineer, Senior Hardware Design | St. Jude Medical | Sunnyvale, CA |
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seeking the following professional: -- Senior Digital IC Design Engineer -- We are ... Other valued skills include synthesis, static timing analysis, and DFT/ATPG... more |
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| Mar 01 | Senior ASIC/Methodology Engineer | Atr International | San Jose, CA |
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Synthesis and STA tools. Experience with DFT Tools Strong scripting skills. For more information call Lecrecia Prince at 408-328-8057 and reference Requisition Number... more |
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| Mar 01 | Senior/Principal Design Engineer | Atr International | San Jose, CA |
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RTL coding using verilog, synthesis, DFT and static timing analysis. Working with verification team and background team to successfully complete chip tape outs The ideal... more |
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| Feb 26 | Senior Manufacturing Test Engineer | Renewable Search Group Tom Derosa | Sunnyvale, CA |
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Sr Manufacturing Test Engineer Location: Northern CA San Jose, Sunnyvale, San ... of PCB-level test, product-level test and DFT principals. Experience with embedded... more |
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| Feb 25 | SENIOR DESIGN ENGINEER | Tandem Recruiting Group | Santa Clara, CA |
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Senior / Principal Design Engineer Low power micro-architecture design techniques are ... RTL coding using verilog, synthesis, DFT and static timing analysis Working with... more |
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| Feb 25 | Engineer, Senior ASIC Design | Marvell | Santa Clara, CA |
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Title: Engineer, Senior ASIC Design Job Category: Engineering Job Sub Category: ... ARM SoC architecture/Amba. * Knowledge of DFT(Design For Test) * Experience in system... more |
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| Feb 25 | Sr. Electrical Design Engineer | Kforce Technology Staffing | San Jose, CA |
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is looking for a Senior Hardware Design Engineer. We are looking for candidates ... verification * Manufacturing support Senior Electrical Design Engineer Education... more |
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| Feb 22 | Sr. Manufacturing Engineer | RSI | San Jose, CA |
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Senior Manufacturing Engineer Location: San Jose, CA $90K - $120K Summary: Work ... systems market. We are looking for a Senior Manufacturing Engineer to help us... more |
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| Feb 22 | Staff Logic Design Engineer | Marvell Technology Group | Santa Clara, CA |
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Senior Design Engineer will be responsible for designing, integrating our wireless ... lab validation and debugging. To support DFT design and ATE testing through out... more |
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| Feb 21 | LEAD ASIC INTEGRATION ENGINEER | NVIDIA | Santa Clara, CA |
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your future may hold. LEAD ASIC INTEGRATION ENGINEER # 1233046 As a senior member of our ... - Full chip integration experience ASIC, ENGINEER, quality, analysis, engineering,... more |
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| Feb 19 | Sr. R&D Engineer | Synopsys | Sunnyvale, CA |
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products including DFTMAX, TetraMAX and DFT Compiler. Responsibilities ... and validation of next generation ATPG, DFT and compression software, as well as... more |
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| Feb 19 | Staff Logic Design Engineer | Marvell | Santa Clara, CA |
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Title: Staff Logic Design Engineer Job Category: Engineering Job Sub Category: ... Description: The Senior Design Engineer will be responsible for designing,... more |
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| Feb 14 | Lead/Senior Hardware Engineer | Cross Creek Systems | San Jose, CA |
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regulators, etc. Working knowledge in DFM, DFT, DVT, and Manufacturing Issues Ability to contribute with minimal supervision in a start-up-like environment. Higher or lower no of... more |
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| Feb 14 | Senior Quality Engineer | Cross Creek Systems | Santa Clara, CA |
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launch. - Produce and evaluate DFM and DFT reports for all new products prior to production launch. Create and document product and manufacturing specifications/procedures to... more |
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| Feb 14 | Senior Mfg. Test Engineer | Cross Creek Systems | Mountain View, CA |
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and designs are compatible and support the DFT/DFM philosophy Responsibilities: * Lead manufacturing test effort with the goal of reducing product assembly and test time, and... more |
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| Feb 14 | Sr Design Verification Engineer | AMD | Sunnyvale, CA |
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South Bridges Group has an opening for a Senior Design Verification Engineer familiar ... testbench architecture, DFT feature testing, testplan creation and... more |
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| Feb 14 | Sr Design Verification Engineer | AMD | Sunnyvale, CA |
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Job Title: Sr Design Verification Engineer Intern/Coop/Student Term: ... South Bridges Group has an opening for a Senior Design Verification Engineer familiar... more |
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| Feb 14 | Senior ASIC/VLSI design Engineer (backend) | Cross Creek Systems | Campbell, CA |
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high-speed interfaces Proven experience in DFT and DFM - generating and debugging test programs/vectors for complex VLSI designs Proven experience in signal integrity is an... more |
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| Feb 13 | Sr. Microprocessor Test Engineer (93K) | Terran Systems | Mountain View, CA |
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Microprocessor Test Engineer (Must have microprocessor test exp. with ... 93K!)Responsibilities: As a Senior Test Engineer you will be responsible for test... more |
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| Feb 12 | Sr. Microprocessor Test Engineer (93K) | Terran Systems | Mountain View, CA |
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93K!) Responsibilities: As a Senior Test Engineer you will be responsible for test ... Involved in the testability review (DFT & DFM) of complex processor devices. more |
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| Feb 10 | Product Engineer (Must have background in CMOS Image Sensors) | Tfi | San Jose, CA |
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Engineer (Must have background in CMOS Image Sensors), Senior Product Engineer ... either Product Engineer or Characterization Engineer that have moved into Design or... more |
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| Feb 09 | SENIOR DFT ENGINEER | NVIDIA | Santa Clara, CA |
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may hold. SENIOR DFT ENGINEER #1068763 As a DFT engineer at NVIDIA, you'll be ... cutting edge DFT involving designing key DFT logic modules, and verifying them. These... more |
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| Feb 09 | ASIC Design Engineer | Cybercoders | San Mateo, CA |
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Engineer - RTL - 65nm - Verification - DFT - FPGA Senior ASIC Design Engineer - RTL ... Benefits Package So, if you are a Senior ASIC Design Engineer with RTL and... more |
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| Feb 07 | Manufacturing Engineer - medical device experience a + | Adecco E&t | San Jose, CA |
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maintaining good personal relationships. Senior Engineers will be expected to ... industry experience * Experience implementing Demand Flow Technology (DFT)... more |
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| Feb 02 | Sustaining Test Engineer | Blue Coat Systems | Sunnyvale, CA |
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Manufacturing/Sustaining Test Engineer will be the owner of the manufacturing test ... appliance products. This role requires the engineer to be the prime technical contact... more |
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| Jan 29 | Manufacturing Engineer - medical device experience a + | Adecco | San Jose, CA |
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maintaining good personal relationships. Senior Engineers will be expected to ... industry experience * Experience implementing Demand Flow Technology (DFT)... more |
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| Jan 22 | Senior Digital IC Design Engineer | Gtronix | Fremont, CA |
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RTL design, RTL verification, DFT, Synthesis, Timing Analysis, Test vector generation, P & R, Physical Verification and silicon bring-up. Candidate should be experienced in... more |
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| Jan 21 | Sr. R&D Engineer | Synopsys | Mountain View, CA |
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position is for a senior R & D engineer of the ASIC design team that is chartered ... Compiler, SystemVerilog/VCS, Primetime, and DFT Compiler is a strong plus. - Good... more |
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| Jan 21 | Sr. Test Engineer | Flextronics | Milpitas, CA |
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seeking a qualified candidate for Sr. Test Engineer (PCBA). This position is ... Perform test ability analysis (DFT) * Develop test fixtures to support test... more |
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| Jan 21 | Senior Digital IC Design Engineer | Baytech Solutions | Fremont, CA |
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Senior Digital IC Design Engineer EXPERIENCE & QUALIFICATIONS: Candidate should ... RTL design, RTL verification, DFT, Synthesis, Timing Analysis, Test vector... more |
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| Jan 21 | Sr. Test Engineer | Flextronics | Milpitas, CA |
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Test Engineer Job Code: 33579 Organization: Global Services Location: Milpitas, CA US ... 0-10% Job Type: Full Time Job Level: Senior, 6-10 years of experience Education:... more |
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| Jan 20 | SENIOR DFT ENGINEER | NVIDIA | Santa Clara, CA |
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SENIOR DFT ENGINEERAs a DFT engineer at NVIDIA, you'll be ... cutting edge DFT involving designing key DFT logic modules, and verifying them. These... more |
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| Jan 20 | Senior Digital IC Design Engineer | Baytech Solutions | Fremont, CA |
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Senior Digital IC Design Engineer EXPERIENCE & QUALIFICATIONS: Candidate should ... RTL design, RTL verification, DFT, Synthesis, Timing Analysis, Test vector... more |
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| Jan 19 | Senior ASIC / Methodology Engineer | Teranetics | San Jose, CA |
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Senior ASIC / Methodology Engineer Job description Requisition Number 0720048 Job ... Job description Senior ASIC / Methodology Engineer As a senior member of our ASIC... more |
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| Jan 19 | Senior / Principal Design Engineer | Teranetics | San Jose, CA |
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Senior / Principal Design Engineer Job description Requisition Number 0720047 Job ... Job description Senior / Principal Design Engineer Low power micro-architecture design... more |
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| Jan 14 | Sr. Digital Design Engineer | Shoreline Digital | Santa Clara, CA |
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TitleSr. Digital Design Engineer Our products emphasize ease of use, small size, low ... logic synthesis, timing analysis and DFT. Responsibilities include: Detailed... more |
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| Jan 13 | Senior ASIC / Methodology Engineer | Teranetics | San Jose, CA |
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Senior ASIC / Methodology Engineer Job description Requisition Number 0720048 Job ... Job description Senior ASIC / Methodology Engineer As a senior member of our ASIC... more |
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| Jan 13 | Sr. Digital Design Engineer | Shoreline Digital | Santa Clara, CA |
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for a hands-on, team oriented, CMOS design engineer with strong digital design ... logic synthesis, timing analysis and DFT. Responsibilities include: Detailed... more |
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| Jan 10 | Sr. Digital Design Engineer | Synaptics | Santa Clara, CA |
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Digital Design Engineer Profession: Analysis/Consulting/Project Management -> Business ... logic synthesis, timing analysis and DFT. Responsibilities include: Detailed... more |
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| Jan 09 | Sr. Microprocessor Test Engineer (93K) | Stingray Systems | Mountain View, CA |
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93K!) Responsibilities: As a Senior Test Engineer you will be responsible for test ... Involved in the testability review (DFT & DFM) of complex processor devices. more |
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| Jan 07 | Senior CPU Physical Design Engineer | NetLogic Microsystems | Cupertino, CA |
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of design floor planning, synthesis, DFT, place and route, clock and power distribution, static timing analysis, signal integrity analysis, physical verification. Use circuit... more |
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| Jan 07 | Sr. Microprocessor Test Engineer (93K) | Stingray Systems | Mountain View, CA |
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93K!) Responsibilities: As a Senior Test Engineer you will be responsible for test ... Involved in the testability review (DFT & DFM) of complex processor devices. more |
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| Jan 06 | Sr. Staff DFT Engineer | Entropic Communications | San Jose, CA |
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Staff DFT Engineer Category: Engineering Type: FullTimeEmployee Description: The DFT ... development of overall methodology for DFT and its efficient automation. A... more |
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| Jan 06 | PROGRAM ENG II / Sr. Manufacturing Engineer | Abbott | Milpitas, CA |
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Implement DFM/DFT approaches. Provide technical support and troubleshooting for ... Preferred Qualifications: Have experience with LEAN/DFT manufacturing, Six Sigma and... more |
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| Jan 06 | Senior CPU Physical Design Engineer | NetLogic Microsystems | Cupertino, CA |
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of design floor planning, synthesis, DFT, place and route, clock and power distribution, static timing analysis, signal integrity analysis, physical verification. Use circuit... more |
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| Dec 29 | Staff Design Engineer | Silicon Image | Sunnyvale, CA |
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is an opportunity for a strong hands-on Senior Design Engineer to make a real ... Do block verification and optimize the RTL for timing/dft/area closure (synthesis,... more |
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| Dec 10 | Staff Design Engineer | Silicom Image | Sunnyvale, CA |
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Design Engineer Description This is an opportunity for a strong hands-on Senior ... Do block verification and optimize the RTL for timing/dft/area closure (synthesis,... more |
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| Dec 08 | Functional Verification Co-Op | AMD | Sunnyvale, CA |
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logic/custom circuit block verification, DFT/BIST verification, ATPG. PREFERRED EDUCATION AND EXPERIENCE: Senior year candidates of BS in EE/CE program, Fisrt year candidates of... more |
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| Dec 07 | Functional Verification Co-Op | AMD | Sunnyvale, CA |
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PREFERRED EDUCATION AND EXPERIENCE: Senior year candidates of BS in EE/CE program, Fisrt year candidates of MS in EE/CE program preferred. At AMD, we are committed to equal... more |
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| Dec 02 | SENIOR DFT ENGINEER | NVIDIA | Santa Clara, CA |
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Title: SENIOR DFT ENGINEER Profession: Computer Engineering and Information ... DFT ENGINEER Job ID 1068763 Description SENIOR DFT ENGINEER #1068763 As a DFT... more |
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| Dec 02 | SR. TIMING METHODOLOGY ENGINEER | NVIDIA | Santa Clara, CA |
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-> Semiconductor Design/Verification Engineer SR. TIMING METHODOLOGY ENGINEER Job ... -> Semiconductor Design/Verification Engineer Design/Verification Digital Chip:... more |
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| Dec 01 | Sr. Test Development Engineer | Apple | Cupertino, CA |
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and Diagnostics on Design for Test (DFT) for new products (i.e. provide feedback ... This is a VERY hands on position at the senior level. Ability to juggle both... more |
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| Nov 30 | Sr.Test Development Engineer | Apple | Cupertino, CA |
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4734710 Job title Sr.Test Development Engineer Location Santa Clara Valley Country ... and Diagnostics on Design for Test (DFT) for new products (i.e. provide feedback... more |
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| Oct 30 | Sr. Electrical Engineer - PEM | Tesla Motors | San Carlos, CA |
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volume offshore manufacturing a DFM and DFT are critical * Experience with product ... degree preferred * 3-5 years as a design engineer, preferably as a project lead. more |
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| Oct 25 | Staff Design Engineer | Silicon Image | Sunnyvale, CA |
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is an opportunity for a strong hands-on Senior Design Engineer to make a real ... Do block verification and optimize the RTL for timing/dft/area closure (synthesis,... more |
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| Oct 24 | LEAD ASIC INTEGRATION ENGINEER | Santa Clara, CA | |
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ASIC INTEGRATION ENGINEER # 1233046As a senior member of our ASIC team, you'll be ... including RTL design, package design, DfT, and place and route. RESPONSIBILITIES:-... more |
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| Oct 19 | Senior Quality and Reliability Engineer | Polycom | San Jose, CA |
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Senior Quality and Reliability Engineer Req Number: 29365 Location: San Jose ... manufacturability (DFM), design for test (DFT), design verification testing (DVT), 4... more |
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| Oct 19 | Product Lifecycle Management and Operations Technical lead | Cisco Systems | San Jose, CA |
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Position: This position is for a senior technical lead within the Customer ... lifecycle. This position will report to a senior manager within Product Operations... more |
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| Oct 10 | LEAD ASIC INTEGRATION ENGINEER | NVIDIA | Santa Clara, CA |
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ASIC INTEGRATION ENGINEER As a senior member of our ASIC team, you'll be leading the ... including RTL design, package design, DfT, and place and route. RESPONSIBILITIES:... more |
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| Oct 09 | LEAD ASIC INTEGRATION ENGINEER | NVIDIA | Santa Clara, CA |
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1233046 Description LEAD ASIC INTEGRATION ENGINEER # 1233046 As a senior member of our ... including RTL design, package design, DfT, and place and route. RESPONSIBILITIES:... more |
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| Oct 09 | Senior Mixed Signal Product Test Engineer (Integrated Systems group) | Cross Creek Systems | Santa Clara, CA |
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Senior Mixed Signal Product Test Engineer We are looking for a senior SoC Test / ... High Speed IO) test program development and DFT analysis. * Serdes Testing and... more |
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| Sep 22 | SENIOR DFT ENGINEER | NVIDIA | Santa Clara, CA |
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SENIOR DFT ENGINEER Job ID 1068763 Description SENIOR DFT ENGINEER #1068763 As a DFT ... you'll be responsible for cutting edge DFT involving designing key DFT logic... more |
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| Aug 19 | Sr. Hardware Design Engineer, iMac | Apple | Cupertino, CA |
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an enthusiastic digital hardware electrical engineer to support electrical & system ... design issues, including cost reduction, DFT and DFM, and reliability required -... more |
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| May 22 | SENIOR DFT ENGINEER | NVIDIA | Santa Clara, CA |
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SENIOR DFT ENGINEER As a DFT engineer at NVIDIA, you'll be ... cutting edge DFT involving designing key DFT logic modules, and verifying them. These... more |
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| Mar 16 | Engineer, Senior Design | Santa Clara, CA | |
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Title: Engineer, Senior Design Job Category: Engineering Job Sub Category: Digital ... such as logic simulator, synthesizer, DFT, ATPG, Static Timing Analyzer & Logic... more |
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